[openssl-commits] [openssl] master update
Andy Polyakov
appro at openssl.org
Mon Dec 14 15:10:54 UTC 2015
The branch master has been updated
via 81eae077ce679c1d7d29e19991bf055e4888a2fc (commit)
via 2688d99989902dea884632a8658f3abad0c26d16 (commit)
from f562aedae47c5702b37fb842f96f48b95019d106 (commit)
- Log -----------------------------------------------------------------
commit 81eae077ce679c1d7d29e19991bf055e4888a2fc
Author: Andy Polyakov <appro at openssl.org>
Date: Sat Nov 14 00:16:37 2015 +0100
crpyto/ppccpuid.pl: add FPU probe and fix OPENSSL_rdtsc.
Reviewed-by: Kurt Roeckx <kurt at openssl.org>
commit 2688d99989902dea884632a8658f3abad0c26d16
Author: Andy Polyakov <appro at openssl.org>
Date: Sat Nov 14 00:10:19 2015 +0100
crypto/ppccap.c: add SIGILL-free processor capability detection code.
Reviewed-by: Kurt Roeckx <kurt at openssl.org>
-----------------------------------------------------------------------
Summary of changes:
crypto/ppc_arch.h | 6 +++
crypto/ppccap.c | 134 ++++++++++++++++++++++++++++++++++++++++++++---------
crypto/ppccpuid.pl | 19 ++++++++
3 files changed, 138 insertions(+), 21 deletions(-)
diff --git a/crypto/ppc_arch.h b/crypto/ppc_arch.h
index b50ec99..c0b4f18 100644
--- a/crypto/ppc_arch.h
+++ b/crypto/ppc_arch.h
@@ -3,8 +3,14 @@
extern unsigned int OPENSSL_ppccap_P;
+/*
+ * Flags' usage can appear ambiguous, because they are set rather
+ * to reflect OpenSSL performance preferences than actual processor
+ * capabilities.
+ */
# define PPC_FPU64 (1<<0)
# define PPC_ALTIVEC (1<<1)
# define PPC_CRYPTO207 (1<<2)
+# define PPC_FPU (1<<3)
#endif
diff --git a/crypto/ppccap.c b/crypto/ppccap.c
index 74af473..c8d012e 100644
--- a/crypto/ppccap.c
+++ b/crypto/ppccap.c
@@ -7,6 +7,12 @@
#if defined(__linux) || defined(_AIX)
# include <sys/utsname.h>
#endif
+#if defined(_AIX53) /* defined even on post-5.3 */
+# include <sys/systemcfg.h>
+# if !defined(__power_set)
+# define __power_set(a) (_system_configuration.implementation & (a))
+# endif
+#endif
#include <openssl/crypto.h>
#include <openssl/bn.h>
@@ -79,10 +85,37 @@ static void ill_handler(int sig)
siglongjmp(ill_jmp, sig);
}
+void OPENSSL_fpu_probe(void);
void OPENSSL_ppc64_probe(void);
void OPENSSL_altivec_probe(void);
void OPENSSL_crypto207_probe(void);
+/*
+ * Use a weak reference to getauxval() so we can use it if it is available
+ * but don't break the build if it is not. Note that this is *link-time*
+ * feature detection, not *run-time*. In other words if we link with
+ * symbol present, it's expected to be present even at run-time.
+ */
+#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
+extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
+#else
+static unsigned long (*getauxval) (unsigned long) = NULL;
+#endif
+
+/* I wish <sys/auxv.h> was universally available */
+#define HWCAP 16 /* AT_HWCAP */
+#define HWCAP_PPC64 (1U << 30)
+#define HWCAP_ALTIVEC (1U << 28)
+#define HWCAP_FPU (1U << 27)
+#define HWCAP_POWER6_EXT (1U << 9)
+#define HWCAP_VSX (1U << 7)
+
+#define HWCAP2 26 /* AT_HWCAP2 */
+#define HWCAP_VEC_CRYPTO (1U << 25)
+
+# if defined(__GNUC__) && __GNUC__>=2
+__attribute__ ((constructor))
+# endif
void OPENSSL_cpuid_setup(void)
{
char *e;
@@ -94,16 +127,6 @@ void OPENSSL_cpuid_setup(void)
return;
trigger = 1;
- sigfillset(&all_masked);
- sigdelset(&all_masked, SIGILL);
- sigdelset(&all_masked, SIGTRAP);
-#ifdef SIGEMT
- sigdelset(&all_masked, SIGEMT);
-#endif
- sigdelset(&all_masked, SIGFPE);
- sigdelset(&all_masked, SIGBUS);
- sigdelset(&all_masked, SIGSEGV);
-
if ((e = getenv("OPENSSL_ppccap"))) {
OPENSSL_ppccap_P = strtoul(e, NULL, 0);
return;
@@ -112,6 +135,8 @@ void OPENSSL_cpuid_setup(void)
OPENSSL_ppccap_P = 0;
#if defined(_AIX)
+ OPENSSL_ppccap_P |= PPC_FPU;
+
if (sizeof(size_t) == 4) {
struct utsname uts;
# if defined(_SC_AIX_KERNEL_BITMODE)
@@ -121,7 +146,69 @@ void OPENSSL_cpuid_setup(void)
if (uname(&uts) != 0 || atoi(uts.version) < 6)
return;
}
+
+# if defined(__power_set)
+ /*
+ * Value used in __power_set is a single-bit 1<<n one denoting
+ * specific processor class. Incidentally 0xffffffff<<n can be
+ * used to denote specific processor and its successors.
+ */
+ if (sizeof(size_t) == 4) {
+ /* In 32-bit case PPC_FPU64 is always fastest [if option] */
+ if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
+ OPENSSL_ppccap_P |= PPC_FPU64;
+ } else {
+ /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
+ if (__power_set(0x1U<<14)) /* POWER6 */
+ OPENSSL_ppccap_P |= PPC_FPU64;
+ }
+
+ if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
+ OPENSSL_ppccap_P |= PPC_ALTIVEC;
+
+ if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
+ OPENSSL_ppccap_P |= PPC_CRYPTO207;
+
+ return;
+# endif
+#endif
+
+ if (getauxval != NULL) {
+ unsigned long hwcap = getauxval(HWCAP);
+
+ if (hwcap & HWCAP_FPU) {
+ OPENSSL_ppccap_P |= PPC_FPU;
+
+ if (sizeof(size_t) == 4) {
+ /* In 32-bit case PPC_FPU64 is always fastest [if option] */
+ if (hwcap & HWCAP_PPC64)
+ OPENSSL_ppccap_P |= PPC_FPU64;
+ } else {
+ /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
+ if (hwcap & HWCAP_POWER6_EXT)
+ OPENSSL_ppccap_P |= PPC_FPU64;
+ }
+ }
+
+ if (hwcap & HWCAP_ALTIVEC) {
+ OPENSSL_ppccap_P |= PPC_ALTIVEC;
+
+ if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
+ OPENSSL_ppccap_P |= PPC_CRYPTO207;
+ }
+
+ return;
+ }
+
+ sigfillset(&all_masked);
+ sigdelset(&all_masked, SIGILL);
+ sigdelset(&all_masked, SIGTRAP);
+#ifdef SIGEMT
+ sigdelset(&all_masked, SIGEMT);
#endif
+ sigdelset(&all_masked, SIGFPE);
+ sigdelset(&all_masked, SIGBUS);
+ sigdelset(&all_masked, SIGSEGV);
memset(&ill_act, 0, sizeof(ill_act));
ill_act.sa_handler = ill_handler;
@@ -130,19 +217,24 @@ void OPENSSL_cpuid_setup(void)
sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
sigaction(SIGILL, &ill_act, &ill_oact);
- if (sizeof(size_t) == 4) {
+ if (sigsetjmp(ill_jmp,1) == 0) {
+ OPENSSL_fpu_probe();
+ OPENSSL_ppccap_P |= PPC_FPU;
+
+ if (sizeof(size_t) == 4) {
#ifdef __linux
- struct utsname uts;
- if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
+ struct utsname uts;
+ if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
#endif
- if (sigsetjmp(ill_jmp, 1) == 0) {
- OPENSSL_ppc64_probe();
- OPENSSL_ppccap_P |= PPC_FPU64;
- }
- } else {
- /*
- * Wanted code detecting POWER6 CPU and setting PPC_FPU64
- */
+ if (sigsetjmp(ill_jmp, 1) == 0) {
+ OPENSSL_ppc64_probe();
+ OPENSSL_ppccap_P |= PPC_FPU64;
+ }
+ } else {
+ /*
+ * Wanted code detecting POWER6 CPU and setting PPC_FPU64
+ */
+ }
}
if (sigsetjmp(ill_jmp, 1) == 0) {
diff --git a/crypto/ppccpuid.pl b/crypto/ppccpuid.pl
index 56cc851..4c2530d 100755
--- a/crypto/ppccpuid.pl
+++ b/crypto/ppccpuid.pl
@@ -23,6 +23,14 @@ $code=<<___;
.machine "any"
.text
+.globl .OPENSSL_fpu_probe
+.align 4
+.OPENSSL_fpu_probe:
+ fmr f0,f0
+ blr
+ .long 0
+ .byte 0,12,0x14,0,0,0,0,0
+.size .OPENSSL_fpu_probe,.-.OPENSSL_fpu_probe
.globl .OPENSSL_ppc64_probe
.align 4
.OPENSSL_ppc64_probe:
@@ -102,8 +110,19 @@ Ladd: lwarx r5,0,r3
.globl .OPENSSL_rdtsc
.align 4
.OPENSSL_rdtsc:
+___
+$code.=<<___ if ($flavour =~ /64/);
+ mftb r3
+___
+$code.=<<___ if ($flavour !~ /64/);
+Loop_rdtsc:
+ mftbu r5
mftb r3
mftbu r4
+ cmplw r4,r5
+ bne Loop_rdtsc
+___
+$code.=<<___;
blr
.long 0
.byte 0,12,0x14,0,0,0,0,0
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