[openssl] OpenSSL_1_1_1-stable update

[Richard Levitte]

The branch OpenSSL_1_1_1-stable has been updated
       via  0d0d12b80456c81faef31fddb9d8e2ccacc2eece (commit)
      from  0584ce737efd26aa82d659087fc9f081ef8e30c4 (commit)


- Log -----------------------------------------------------------------
commit 0d0d12b80456c81faef31fddb9d8e2ccacc2eece
Author: Hua Zhang <hua.zhang1974 at hotmail.com>
Date:   Wed Mar 13 14:28:44 2019 +0800

    Fix compiling error for mips32r6 and mips64r6
    
    There are some compiling errors for mips32r6 and mips64r6:
    
    crypto/bn/bn-mips.S:56: Error: opcode not supported on this processor: mips2 (mips2) `mulu $1,$12,$7'
    crypto/mips_arch.h: Assembler messages:
    crypto/mips_arch.h:15: Error: junk at end of line, first unrecognized character is `&'
    
    Signed-off-by: Hua Zhang <hua.zhang1974 at hotmail.com>
    
    Reviewed-by: Matt Caswell <matt at openssl.org>
    Reviewed-by: Richard Levitte <levitte at openssl.org>
    (Merged from https://github.com/openssl/openssl/pull/8464)
    
    (cherry picked from commit 1b9c5f2e2f283a3b12d02a89c11b8e8d97bc6312)

-----------------------------------------------------------------------

Summary of changes:
 crypto/bn/asm/mips.pl | 2 +-
 crypto/mips_arch.h    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/crypto/bn/asm/mips.pl b/crypto/bn/asm/mips.pl
index 3875132..8574e57 100644
--- a/crypto/bn/asm/mips.pl
+++ b/crypto/bn/asm/mips.pl
@@ -89,7 +89,7 @@ if ($flavour =~ /64|n32/i) {
 	$SZREG=4;
 	$REG_S="sw";
 	$REG_L="lw";
-	$code=".set	mips2\n";
+	$code="#if !(defined (__mips_isa_rev) && (__mips_isa_rev >= 6))\n.set     mips2\n#endif\n";
 }
 
 # Below is N32/64 register layout used in the original module.
diff --git a/crypto/mips_arch.h b/crypto/mips_arch.h
index 75043e7..6145f4d 100644
--- a/crypto/mips_arch.h
+++ b/crypto/mips_arch.h
@@ -11,7 +11,7 @@
 # define __MIPS_ARCH_H__
 
 # if (defined(__mips_smartmips) || defined(_MIPS_ARCH_MIPS32R3) || \
-      defined(_MIPS_ARCH_MIPS32R5) || defined(_MIPS_ARCH_MIPS32R6))
+      defined(_MIPS_ARCH_MIPS32R5) || defined(_MIPS_ARCH_MIPS32R6)) \
       && !defined(_MIPS_ARCH_MIPS32R2)
 #  define _MIPS_ARCH_MIPS32R2
 # endif