[openssl/openssl] cdea67: riscv: Add basic vector extension support

David von Oheimb noreply at github.com
Thu Oct 26 15:05:19 UTC 2023

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  Branch: refs/heads/master
  Home:   https://github.com/openssl/openssl
  Commit: cdea67193da8aab0f1a49d2b7ce144ad21bfc51d
      https://github.com/openssl/openssl/commit/cdea67193da8aab0f1a49d2b7ce144ad21bfc51d
  Author: Christoph Müllner <christoph.muellner at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/riscv64cpuid.pl
    M crypto/riscvcap.c
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h

  Log Message:
  -----------
  riscv: Add basic vector extension support

The RISC-V vector extension comes with an implementation-defined
number of bits per vector register (VLEN), which can be read out at
run-time using the CSR 'vlenb' (which returns VLEN/8) followed by a
multiplication by 8 (to convert bytes to bits).

This patch introduces a RISC-V capability 'V' to specify the
availability of the vector extension. If this extension is found at
run-time, then we read out VLEN as described above and cache it.
Caching ensures that we only read the CSR once at startup.
This is necessary because reading out CSR can be expensive
(e.g. if CSR readout is implemented using trap-and-emulate).

Follow-up patches can make use of VLEN and chose the best strategy
based on the available length of the vector registers.

Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 003f5698146b81f3185d7f17d60a7351c69e236d
      https://github.com/openssl/openssl/commit/003f5698146b81f3185d7f17d60a7351c69e236d
  Author: Christoph Müllner <christoph.muellner at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/modes/asm/ghash-riscv64-zvbb-zvbc.pl
    M crypto/modes/build.info
    M crypto/modes/gcm128.c
    M crypto/perlasm/riscv.pm
    M include/crypto/riscv_arch.def

  Log Message:
  -----------
  riscv: GCM: Provide a Zvbb/Zvbc-based implementation

The RISC-V vector crypto extensions features a Zvbc extension
that provides a carryless multiplication ('vclmul.vv') instruction.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 5191bcc81650c34a4660a0921124e4195e18e4b0
      https://github.com/openssl/openssl/commit/5191bcc81650c34a4660a0921124e4195e18e4b0
  Author: Christoph Müllner <christoph.muellner at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/modes/asm/ghash-riscv64-zvkg.pl
    M crypto/modes/build.info
    M crypto/modes/gcm128.c
    M crypto/perlasm/riscv.pm
    M include/crypto/riscv_arch.def

  Log Message:
  -----------
  riscv: GCM: Provide a Zvkg-based implementation

The upcoming RISC-V vector crypto extensions feature
a Zvkg extension, that provides a vghmac.vv instruction.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: f6631e38f901e2a439604fac2bd62933f9dbb8ad
      https://github.com/openssl/openssl/commit/f6631e38f901e2a439604fac2bd62933f9dbb8ad
  Author: Christoph Müllner <christoph.muellner at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/aes/asm/aes-riscv64-zvkned.pl
    M crypto/aes/build.info
    M crypto/perlasm/riscv.pm
    M include/crypto/aes_platform.h
    M include/crypto/riscv_arch.def
    M providers/implementations/ciphers/cipher_aes_ccm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_gcm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_ocb_hw.c
    M providers/implementations/ciphers/cipher_aes_xts_hw.c

  Log Message:
  -----------
  riscv: AES: Provide a Zvkned-based implementation

The upcoming RISC-V vector crypto extensions provide
the Zvkned extension, that provides a AES-specific instructions.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 204a1c9854193bd7fcc3ea1baaf685c9a67d17bb
      https://github.com/openssl/openssl/commit/204a1c9854193bd7fcc3ea1baaf685c9a67d17bb
  Author: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/sha/sha256.c

  Log Message:
  -----------
  crypto: sha256: Add mechanism to keep C code as fallback for SHA256_ASM

Currently, architectures have to decide if they want the C code or an
arch-specific implementation. Let's add a macro, that allows to keep the C
code even if SHA256_ASM is defined (but rename it from sha256_block_data_order
to sha256_block_data_order_c). The macro INCLUDE_C_SHA256 can be used by
architectures, that want the C code as fallback code.

Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 17073066520dbbf1ef3ce4856c570d61e9548083
      https://github.com/openssl/openssl/commit/17073066520dbbf1ef3ce4856c570d61e9548083
  Author: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/perlasm/riscv.pm
    A crypto/sha/asm/sha256-riscv64-zvbb-zvknha.pl
    M crypto/sha/build.info
    A crypto/sha/sha_riscv.c
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h

  Log Message:
  -----------
  riscv: sha256: Provide a Zvknha-based implementation

The upcoming RISC-V vector crypto extensions feature
a Zvknha extension, that provides sha256-specific instructions.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: db44a69aa5ce4bdc3e232ad9d7216af0eda65836
      https://github.com/openssl/openssl/commit/db44a69aa5ce4bdc3e232ad9d7216af0eda65836
  Author: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/sha/sha512.c

  Log Message:
  -----------
  crypto: sha512: Add mechanism to keep C code as fallback for SHA512_ASM

Currently, architectures have to decide if they want the C code or an
arch-specific implementation. Let's add a macro, that allows to keep the C
code even if SHA512_ASM is defined (but rename it from sha512_block_data_order
to sha512_block_data_order_c). The macro INCLUDE_C_SHA512 can be used by
architectures, that want the C code as fallback code.

Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 9c22a240dab51dc9a5583d36726b81073f9c8d34
      https://github.com/openssl/openssl/commit/9c22a240dab51dc9a5583d36726b81073f9c8d34
  Author: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/perlasm/riscv.pm
    A crypto/sha/asm/sha512-riscv64-zvbb-zvknhb.pl
    M crypto/sha/build.info
    M crypto/sha/sha_riscv.c
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h

  Log Message:
  -----------
  riscv: sha512: Provide a Zvknhb-based implementation

The upcoming RISC-V vector crypto extensions feature
a Zvknhb extension, that provides sha512-specific istructions.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 7543bb3a69c021edbe73bb38a8cc4d3708a68c5d
      https://github.com/openssl/openssl/commit/7543bb3a69c021edbe73bb38a8cc4d3708a68c5d
  Author: Christoph Müllner <christoph.muellner at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/perlasm/riscv.pm
    A crypto/sm4/asm/sm4-riscv64-zvksed.pl
    M crypto/sm4/build.info
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h
    M include/crypto/sm4_platform.h
    M providers/implementations/ciphers/cipher_sm4_ccm.h
    M providers/implementations/ciphers/cipher_sm4_ccm_hw.c
    A providers/implementations/ciphers/cipher_sm4_ccm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_gcm_hw.c
    A providers/implementations/ciphers/cipher_sm4_gcm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_hw.c
    A providers/implementations/ciphers/cipher_sm4_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_xts_hw.c
    A providers/implementations/ciphers/cipher_sm4_xts_hw_rv64i.inc

  Log Message:
  -----------
  riscv: SM4: Provide a Zvksed-based implementation

The upcoming RISC-V vector crypto extensions feature
a Zvksed extension, that provides SM4-specific instructions.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: f20ee1f4908f1da9ebc072043b3cfbb90eba2508
      https://github.com/openssl/openssl/commit/f20ee1f4908f1da9ebc072043b3cfbb90eba2508
  Author: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/perlasm/riscv.pm
    A crypto/sm3/asm/sm3-riscv64-zvksh.pl
    M crypto/sm3/build.info
    M crypto/sm3/sm3_local.h
    A crypto/sm3/sm3_riscv.c
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h

  Log Message:
  -----------
  riscv: SM3: Provide a Zvksh-based implementation

The upcoming RISC-V vector crypto extensions feature
a Zvksh extension, that provides SM3-specific istructions.
This patch provides an implementation that utilizes this
extension if available.

Tested on QEMU and no regressions observed.

Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas at vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 94474e02fa217c037ece9d819a9b12025f65cdb9
      https://github.com/openssl/openssl/commit/94474e02fa217c037ece9d819a9b12025f65cdb9
  Author: Ard Biesheuvel <ardb at google.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/aes/asm/aes-riscv64-zvkned.pl
    M providers/implementations/ciphers/cipher_aes_ccm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_gcm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_aes_ocb_hw.c
    M providers/implementations/ciphers/cipher_aes_xts_hw.c

  Log Message:
  -----------
  riscv: Implement AES-192

Even though the RISC-V vector instructions only support AES-128 and
AES-256 for key generation, the round instructions themselves can
easily be used to implement AES-192 too - we just need to fallback to
the generic key generation routines in this case.

Note that the vector instructions use the encryption key schedule (but
in reverse order) so we need to generate the encryption key schedule
even when doing decryption using the vector instructions.

Signed-off-by: Ard Biesheuvel <ardb at google.com>
Signed-off-by: Christoph Müllner <christoph.muellner at vrull.eu>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 33469d0370a67d754c00513f1d8b263768e568b7
      https://github.com/openssl/openssl/commit/33469d0370a67d754c00513f1d8b263768e568b7
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/modes/asm/ghash-riscv64-zvbb-zvbc.pl
    M crypto/modes/asm/ghash-riscv64-zvkg.pl

  Log Message:
  -----------
  Fix typo in ghash-riscv64*.pl

Changed "mutiple" to "multiple" for improved clarity and correctness.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 216424e18d00685bb4a4a25cef0df5347d7215a4
      https://github.com/openssl/openssl/commit/216424e18d00685bb4a4a25cef0df5347d7215a4
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/perlasm/riscv.pm

  Log Message:
  -----------
  riscv: Add RISC-V Vector opcode in riscv.pm

Added helper functions and opcode encoding functions
in riscv.pm perl module to avoid pointless code duplication.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 42f112284862bb0744d37c2f3301c7163179cf15
      https://github.com/openssl/openssl/commit/42f112284862bb0744d37c2f3301c7163179cf15
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/aes/asm/aes-riscv64-zvkned.pl

  Log Message:
  -----------
  riscv: Further optimization for single block aes-zvkned encryption.

Interleave key loading and aes encrypt computing for single block aes.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: d26d01e5ec29ce0c94ae18c9cdedd8f1c036fcc3
      https://github.com/openssl/openssl/commit/d26d01e5ec29ce0c94ae18c9cdedd8f1c036fcc3
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/aes/asm/aes-riscv64-zvkned.pl

  Log Message:
  -----------
  riscv: Further optimization for single block aes-zvkned decryption.

Interleave key loading and aes decrypt computing for single block aes.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 3645eb0be22a4cea4300ab5afbf248d195d0f45b
      https://github.com/openssl/openssl/commit/3645eb0be22a4cea4300ab5afbf248d195d0f45b
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    R crypto/modes/asm/ghash-riscv64-zvbb-zvbc.pl
    A crypto/modes/asm/ghash-riscv64-zvkb-zvbc.pl
    M crypto/modes/asm/ghash-riscv64-zvkg.pl
    M crypto/modes/build.info
    M crypto/modes/gcm128.c
    M crypto/perlasm/riscv.pm
    M crypto/sm4/asm/sm4-riscv64-zvksed.pl
    M include/crypto/riscv_arch.def
    M include/crypto/riscv_arch.h
    M providers/implementations/ciphers/cipher_sm4_ccm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_gcm_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_hw_rv64i.inc
    M providers/implementations/ciphers/cipher_sm4_xts_hw_rv64i.inc

  Log Message:
  -----------
  Update for Zvkb extension.

https://github.com/riscv/riscv-crypto/blob/c8ddeb7e64a3444dda0438316af1238aeed72041/doc/vector/riscv-crypto-vector-zvkb.adoc
Create `RISCV_HAS_ZVKB()` macro.
Use zvkb for SM4 instead of zvbb.
Use zvkb for ghash instead of zvbb.
We could just use the zvbb's subset `zvkb` for flexibility.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 5e16a6276bf4624fb15ec26b49219af5b2ed19d1
      https://github.com/openssl/openssl/commit/5e16a6276bf4624fb15ec26b49219af5b2ed19d1
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/aes/asm/aes-riscv64-zvkned.pl

  Log Message:
  -----------
  riscv: Provide vector crypto implementation of AES-CBC mode.

To accelerate the performance of the AES-128/192/256-CBC block cipher
encryption, we used the vaesz, vaesem and vaesef instructions, which
implement a single round of AES encryption.

Similarly, to optimize the performance of AES-128/192/256-CBC block
cipher decryption, we have utilized the vaesz, vaesdm, and vaesdf
instructions, which facilitate a single round of AES decryption.

Furthermore, we optimize the key and initialization vector (IV) step by
keeping the rounding key in vector registers.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 562b4eb4c131b7c639abbc1a93d40de497f32a0f
      https://github.com/openssl/openssl/commit/562b4eb4c131b7c639abbc1a93d40de497f32a0f
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M include/crypto/aes_platform.h
    M providers/implementations/ciphers/cipher_aes_hw_rv64i.inc

  Log Message:
  -----------
  riscv: Use the optimized rvv AES-128/192/256-CBC.

Replace old CBC implementation with optimized AES-128/192/256-CBC in
this patch.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 7914a0de113b1861a0ce5ff1bcbc602a42abe8da
      https://github.com/openssl/openssl/commit/7914a0de113b1861a0ce5ff1bcbc602a42abe8da
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M test/recipes/30-test_evp_data/evpciph_aes_common.txt

  Log Message:
  -----------
  Provide additional AES-CBC test patterns to enhance test coverage.

To enhance test coverage for AES-CBC mode, we provided longer additional
test patterns for AES-CBC testing.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: fcf68127e2e171fc0bf1889071768279410fdb80
      https://github.com/openssl/openssl/commit/fcf68127e2e171fc0bf1889071768279410fdb80
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/chacha/asm/chacha-riscv64-zvkb.pl
    M crypto/chacha/build.info
    M crypto/chacha/chacha_enc.c
    A crypto/chacha/chacha_riscv.c
    M include/crypto/chacha.h

  Log Message:
  -----------
  riscv: Provide a vector implementation of CHACHA20 cipher.

Use rvv and zvbb extensions for CHACHA20 cipher.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: a1668660a76e180af5fe1510a4c01c0c2854cdcf
      https://github.com/openssl/openssl/commit/a1668660a76e180af5fe1510a4c01c0c2854cdcf
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    R crypto/sha/asm/sha256-riscv64-zvbb-zvknha.pl
    A crypto/sha/asm/sha256-riscv64-zvkb-zvknha_or_zvknhb.pl
    M crypto/sha/build.info
    M crypto/sha/sha_riscv.c

  Log Message:
  -----------
  riscv: Code optimization for SHA-256.

Keep SHA-256 constant values in registers to save the loading time.

Move the constant loading for sha256 into a separate subroutine.
By creating a dedicated sub routine for loading sha256 constants, the
code can be made more modular and easier to modify in the future.

Relaxing the SHA256 constraint, zvknhb also supports SHA256.

Simplify the H and mask initialization flows.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 837f7df8c0a4122ae95b0859329c9327a44e1764
      https://github.com/openssl/openssl/commit/837f7df8c0a4122ae95b0859329c9327a44e1764
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    R crypto/sha/asm/sha512-riscv64-zvbb-zvknhb.pl
    A crypto/sha/asm/sha512-riscv64-zvkb-zvknhb.pl
    M crypto/sha/build.info
    M crypto/sha/sha_riscv.c

  Log Message:
  -----------
  riscv: Support SHA-512 family on platforms with vlen >= 128.

This patch supports SHA-512, SHA-512/224, SHA-512/256 on platforms with
vlen greater than 128,

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 18ed3a58b01f8f1affdedced1f4f62447b7df9f9
      https://github.com/openssl/openssl/commit/18ed3a58b01f8f1affdedced1f4f62447b7df9f9
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/aes/asm/aes-riscv64-zvkb-zvkned.pl
    M crypto/aes/build.info
    M include/crypto/aes_platform.h
    M providers/implementations/ciphers/cipher_aes_hw_rv64i.inc

  Log Message:
  -----------
  riscv: Provide vector crypto implementation of AES-CTR mode.

Support zvbb-zvkned based rvv AES-128/192/256-CTR encryption.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 7468a3db137bd22dacbcced379b0711986b57067
      https://github.com/openssl/openssl/commit/7468a3db137bd22dacbcced379b0711986b57067
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M providers/implementations/ciphers/cipher_aes_gcm_hw.c

  Log Message:
  -----------
  Minor changes of the GCM-related code.

Unify the return value for `CRYPTO_gcm128_decrypt` as `CRYPTO_gcm128_encrypt`.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: d056e90ee58a039263b843e8fa330fa71b4d4835
      https://github.com/openssl/openssl/commit/d056e90ee58a039263b843e8fa330fa71b4d4835
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/modes/asm/aes-gcm-riscv64-zvbb-zvkg-zvkned.pl
    M crypto/modes/build.info
    M include/crypto/aes_platform.h
    M providers/implementations/ciphers/cipher_aes_gcm_hw_rv64i.inc

  Log Message:
  -----------
  riscv: Provide vector crypto implementation of AES-GCM mode.

To accelerate the performance of the AES-GCM mode, in this patch, we
have the specialized multi-block implementations for AES-128-GCM,
AES-192-GCM and AES-256-GCM.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>
Signed-off-by: Jerry Shih <jerry.shih at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: ebecf322e52bf3cabaf36335c138712ae658503f
      https://github.com/openssl/openssl/commit/ebecf322e52bf3cabaf36335c138712ae658503f
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    R crypto/modes/asm/aes-gcm-riscv64-zvbb-zvkg-zvkned.pl
    A crypto/modes/asm/aes-gcm-riscv64-zvkb-zvkg-zvkned.pl
    M crypto/modes/build.info
    M include/crypto/aes_platform.h
    M providers/implementations/ciphers/cipher_aes_gcm_hw_rv64i.inc
    M test/recipes/30-test_evp_data/evpciph_aes_common.txt

  Log Message:
  -----------
  Provide additional AES-GCM test patterns to enhance test coverage.

To enhance test coverage for AES-GCM mode, we provided longer additional
testing patterns for AES-GCM testing.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>
Signed-off-by: Jerry Shih <jerry.shih at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: a5871e951d3f3c3f0c498a0420c5ce1f53c425a5
      https://github.com/openssl/openssl/commit/a5871e951d3f3c3f0c498a0420c5ce1f53c425a5
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M providers/implementations/ciphers/cipher_aes_xts_hw.c

  Log Message:
  -----------
  Fix the aes-xts key-length checking condition and hw declaration.

The argument `key-length` includes 2 sets of keys.

All declarations should under `PROV_CIPHER_HW_declare_xts()` macro.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 3e56c0efe72aad6d4246149d9461af48072b681b
      https://github.com/openssl/openssl/commit/3e56c0efe72aad6d4246149d9461af48072b681b
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    A crypto/aes/asm/aes-riscv64-zvbb-zvkg-zvkned.pl
    M crypto/aes/build.info
    M crypto/perlasm/riscv.pm
    M include/crypto/aes_platform.h
    M providers/implementations/ciphers/cipher_aes_xts_hw.c

  Log Message:
  -----------
  riscv: Provide vector crypto implementation of AES-128/256-XTS mode.

To accelerate the performance of the AES-XTS mode, in this patch, we
have the specialized multi-block implementation for AES-128-XTS and
AES-256-XTS.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: fbe634836383cff2d01128530f1aa86a1a280a33
      https://github.com/openssl/openssl/commit/fbe634836383cff2d01128530f1aa86a1a280a33
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M test/recipes/30-test_evp_data/evpciph_aes_common.txt

  Log Message:
  -----------
  Provide additional AES-XTS test patterns to enhance test coverage.

To enhance test coverage for AES-XTS mode, we provided longer additional
testing patterns from BoringSSL for AES-XTS testing.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 1c25bc2e3f5e9db90a1d7bc4f0bae1b59e5f2c4c
      https://github.com/openssl/openssl/commit/1c25bc2e3f5e9db90a1d7bc4f0bae1b59e5f2c4c
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/sm3/asm/sm3-riscv64-zvksh.pl
    M crypto/sm3/sm3_riscv.c

  Log Message:
  -----------
  riscv: Support sm3 on platforms with vlen >= 128.

This patch updates the OSSSL_HWSM3_block_data_order_zvksh and enables
SM3 on platforms with VLEN >= 128.

Signed-off-by: Jerry Shih <jerry.shih at sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: 751a22194e4dc52532d2aedd49fe62dbea0badc8
      https://github.com/openssl/openssl/commit/751a22194e4dc52532d2aedd49fe62dbea0badc8
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/aes/asm/aes-riscv64-zvkned.pl
    M providers/implementations/ciphers/cipher_aes_hw_rv64i.inc

  Log Message:
  -----------
  riscv: Provide vector crypto implementation of AES-ECB mode.

This patch provides stream and multi-block implementations for
AES-128-ECB, AES-192-ECB, and AES-256-ECB to accelerate AES-ECB.
Also, refactor functions to share the same variable
declaration in aes-riscv64-zvkned.pl.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: f03ce9e0194ab1b5422bc582eb81b8babaef49c5
      https://github.com/openssl/openssl/commit/f03ce9e0194ab1b5422bc582eb81b8babaef49c5
  Author: Phoebe Chen <phoebe.chen at sifive.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M test/recipes/30-test_evp_data/evpciph_aes_common.txt

  Log Message:
  -----------
  Provide additional AES-ECB test patterns to enhance test coverage.

To enhance test coverage for AES-ECB mode, we provided longer additional
testing patterns for AES-128/192/256-ECB.

Signed-off-by: Phoebe Chen <phoebe.chen at sifive.com>

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)


  Commit: d7ad09da778bcc0090a7cdfd87edb56eea22382b
      https://github.com/openssl/openssl/commit/d7ad09da778bcc0090a7cdfd87edb56eea22382b
  Author: Dr. David von Oheimb <dev at ddvo.net>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/cms/cms_sd.c
    M crypto/pkcs7/pk7_doit.c

  Log Message:
  -----------
  CMS and PKCS7: fix handlling of EVP_PKEY_get_size() failure

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22459)


  Commit: ae643b32f91affe61dd411a58b76c8a44cbd7f50
      https://github.com/openssl/openssl/commit/ae643b32f91affe61dd411a58b76c8a44cbd7f50
  Author: Dr. David von Oheimb <dev at ddvo.net>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M crypto/err/openssl.txt
    M crypto/evp/evp_err.c
    M crypto/evp/p_lib.c
    M include/crypto/evperr.h
    M include/openssl/evperr.h

  Log Message:
  -----------
  EVP_PKEY_get_{bits,security_bits,size}(): add missing error queue entry on failure

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22459)


  Commit: 09298141592c579504966f1907a44cb95f37cc6e
      https://github.com/openssl/openssl/commit/09298141592c579504966f1907a44cb95f37cc6e
  Author: Dr. David von Oheimb <dev at ddvo.net>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M doc/man3/EVP_PKEY_get_size.pod
    M doc/man7/provider-keymgmt.pod

  Log Message:
  -----------
  EVP_PKEY_get_size.pod and provider-keymgmt.pod: document their relation

Reviewed-by: Tomas Mraz <tomas at openssl.org>
Reviewed-by: Paul Dale <pauli at openssl.org>
Reviewed-by: Hugo Landau <hlandau at openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22459)


Compare: https://github.com/openssl/openssl/compare/2126ca3dba39...09298141592c

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