[openssl-dev] [openssl.org #3843] OpenSSL 1.0.1* and below: incorrect use of _lrotl()

Lei Zhang via RT rt at openssl.org
Tue May 26 01:14:47 UTC 2015


> On May 26, 2015, at 12:01 AM, Andy Polyakov <appro at openssl.org> wrote:
> 
>>>> Yes, I added a new target "linux-mic" into Configure, which is slightly modified from "linux-generic64".
>>>> 
>>>> From the original patch:
>>>> 
>>>> (...)
>>>> "linux-generic64","gcc:-DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
>>>> +"linux-mic","icc:-mmic -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
>>>> (...)
>>> 
>>> But what prevents you from 'env CC=icc ./Configure linux-generic64
>>> -mmic'? Or same with linux-x86_64? Can you confirm if './Configure
>>> linux-x86_64-icc -mmic' works in 1.0.2?
>> 
>> 'CC="icc -mmic" ./Configure shared linux-generic64' works in 1.0.0. It's better than modifying Configure. I just didn't think of it. 
>> 
>> But it doesn't work in 1.0.2, getting some link error:
>> ../libcrypto.so: undefined reference to `rc4_md5_enc'
> 
> Yes, similar issue was reported in another context and it will be
> resolved. Meanwhile could you pass explicit no-asm to confirm that it's
> in *general* viable option for you.
> 
>> And linux-x86_64 won't work here, since it uses some instructions not supported by MIC. 
> 
> But all x86_64 modules feature run-time switch, when processor
> capabilities are detected [with cpuid] and code that can't be executed
> on any particular processor won't execute. Or do you mean that fails to
> *compile* it with -mmic? Or do you mean that cpuid doesn't work on mic?
> But I recall that there is cpuid...

It fails to compile with -mmic:
x86_64cpuid.s:165: Error: `pxor' is not supported on `k1om'
(...)

Here 'pxor' is a MMX instruction, but MIC doesn't support MMX. MIC has its own 512-bit SIMD instruction set, which is not backward-compatible like AVX512.


Lei




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