[openssl-dev] [openssl.org #4124] Illegal instruction when using aes-ni-sha256 stitched implementation on AMD CPU
Kurt Roeckx via RT
rt at openssl.org
Sun Nov 8 11:43:09 UTC 2015
On Sun, Nov 08, 2015 at 11:37:55AM +0000, Tomas Mraz via RT wrote:
> The aes-ni-sha256 stitched implementation causes SIGILL on AMD A4-6210.
> It is caused by not using the AVX+SSSE3 code path for non-Intel CPUs
> although the CPU seems to be fully capable of running it.
>
> The ia32cap vector is 0x7ED8220B078BFFFF but when you set it explicitly
> with OPENSSL_ia32cap=0x7ED8220B478BFFFF (i.e. the Intel CPU bit is set)
> it works fine and the AVX+SSSE3 codepath is taken.
>
> See also https://bugzilla.redhat.com/show_bug.cgi?id=1278194 for
> details.
An other bug about this is:
https://bugs.debian.org/793557
There is already a patch for this waiting review.
Kurt
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