[openssl-dev] 答复: 答复: 答复: [openssl.org #4360] [BUG] OpenSSL-1.0.1 crash on sha1_block_data_order_ssse3 asm

Hejian via RT rt at openssl.org
Tue Mar 8 02:19:49 UTC 2016


Hi Jeff,

I'm not sure this information is enough, if you want more information about this problem, please tell me ASAP.

Thank you.
B/R

-----邮件原件-----
发件人: Hejian (E) 
发送时间: 2016年3月7日 11:24
收件人: 'noloader at gmail.com'
抄送: openssl-dev at openssl.org; Liubo (Liubo, OSS); 'rt at openssl.org'
主题: 答复: [openssl-dev] 答复: 答复: [openssl.org #4360] [BUG] OpenSSL-1.0.1 crash on sha1_block_data_order_ssse3 asm

Hi Jeff

Thanks for your reply, this are registers info:

(gdb) info all-registers
rax            0x745dd1f0	1952305648
rbx            0xf92ba6dd	4180387549
rcx            0x7b69e2f6	2070536950
rdx            0x86dab00c	2262478860
rsi            0x6436d580	1681315200
rdi            0x4763c5a8	1197721000
rbp            0x72856ca1	0x72856ca1
rsp            0x50a7e100	0x50a7e100
r8             0x55555a419c60	93825074830432
r9             0x2b4174415ff8	47560123310072
r10            0x2b417433acb8	47560122412216
r11            0x2b41740e9080	47560119980160
r12            0xffffffffffffffe7	-25
r13            0x2b417433acf8	47560122412280
r14            0x55555a419c7c	93825074830460
r15            0x3ff	1023
rip            0x2b41740e8db8	0x2b41740e8db8 <sha1_block_data_order_ssse3+2984>
eflags         0x10202	[ IF RF ]
cs             0x33	51
ss             0x2b	43
ds             0x0	0
es             0x0	0
fs             0x63	99
gs             0x0	0
st0            0	(raw 0x00000000000000000000)
st1            0	(raw 0x00000000000000000000)
st2            0	(raw 0x00000000000000000000)
st3            0	(raw 0x00000000000000000000)
st4            0	(raw 0x00000000000000000000)
st5            0	(raw 0x00000000000000000000)
st6            0	(raw 0x00000000000000000000)
st7            0	(raw 0x00000000000000000000)
fctrl          0x37f	895
fstat          0x0	0
ftag           0xffff	65535
fiseg          0x0	0
fioff          0x0	0
foseg          0x0	0
fooff          0x0	0
fop            0x0	0
xmm0           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0xd3, 0x54, 0x10, 0xaa, 0xa1, 0x94, 0x90, 0x33, 0x41, 0xcc, 0x30, 0x31, 0x73, 
    0x5c, 0x80, 0xac}, v8_int16 = {0x54d3, 0xaa10, 0x94a1, 0x3390, 0xcc41, 0x3130, 0x5c73, 0xac80}, v4_int32 = {0xaa1054d3, 0x339094a1, 0x3130cc41, 0xac805c73},
  v2_int64 = {0x339094a1aa1054d3, 0xac805c733130cc41}, uint128 = 0xac805c733130cc41339094a1aa1054d3}
---Type <return> to continue, or q <return> to quit---
xmm1           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x32, 0x47, 0xe5, 0x7e, 0x72, 0x80, 0xf1, 0xf, 0x66, 0x60, 0x37, 0xf, 0x99, 
    0x44, 0x6, 0xb7}, v8_int16 = {0x4732, 0x7ee5, 0x8072, 0xff1, 0x6066, 0xf37, 0x4499, 0xb706}, v4_int32 = {0x7ee54732, 0xff18072, 0xf376066, 0xb7064499},
  v2_int64 = {0xff180727ee54732, 0xb70644990f376066}, uint128 = 0xb70644990f3760660ff180727ee54732}
xmm2           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x7d, 0xcc, 0xbf, 0xf8, 0xc3, 0xd1, 0x32, 0x9, 0x33, 0x61, 0xb0, 0xba, 0x6d, 
    0x9, 0xde, 0x80}, v8_int16 = {0xcc7d, 0xf8bf, 0xd1c3, 0x932, 0x6133, 0xbab0, 0x96d, 0x80de}, v4_int32 = {0xf8bfcc7d, 0x932d1c3, 0xbab06133, 0x80de096d},
  v2_int64 = {0x932d1c3f8bfcc7d, 0x80de096dbab06133}, uint128 = 0x80de096dbab061330932d1c3f8bfcc7d}
xmm3           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x8000000000000000}, v16_int8 = {0x7b, 0x59, 0xd6, 0x82, 0x4, 0xd2, 0x31, 0x1e, 0xf, 0x72, 0x86, 
    0x7e, 0x13, 0x23, 0x2d, 0x5b}, v8_int16 = {0x597b, 0x82d6, 0xd204, 0x1e31, 0x720f, 0x7e86, 0x2313, 0x5b2d}, v4_int32 = {0x82d6597b, 0x1e31d204, 0x7e86720f, 
    0x5b2d2313}, v2_int64 = {0x1e31d20482d6597b, 0x5b2d23137e86720f}, uint128 = 0x5b2d23137e86720f1e31d20482d6597b}
xmm4           {v4_float = {0x0, 0x2eef0000, 0x0, 0x0}, v2_double = {0x8000000000000000, 0x8000000000000000}, v16_int8 = {0xec, 0x23, 0xe4, 0x91, 0x11, 0xd1, 0xa, 
    0xd3, 0x41, 0x2d, 0xb5, 0x7b, 0x89, 0x87, 0x99, 0xed}, v8_int16 = {0x23ec, 0x91e4, 0xd111, 0xd30a, 0x2d41, 0x7bb5, 0x8789, 0xed99}, v4_int32 = {0x91e423ec, 
    0xd30ad111, 0x7bb52d41, 0xed998789}, v2_int64 = {0xd30ad11191e423ec, 0xed9987897bb52d41}, uint128 = 0xed9987897bb52d41d30ad11191e423ec}
xmm5           {v4_float = {0x1, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x79, 0x55, 0x93, 0x3f, 0x52, 0x79, 0x16, 0x14, 0xd2, 0xdc, 0x77, 0x1f, 0xa3, 
    0x65, 0x51, 0x33}, v8_int16 = {0x5579, 0x3f93, 0x7952, 0x1416, 0xdcd2, 0x1f77, 0x65a3, 0x3351}, v4_int32 = {0x3f935579, 0x14167952, 0x1f77dcd2, 0x335165a3},
  v2_int64 = {0x141679523f935579, 0x335165a31f77dcd2}, uint128 = 0x335165a31f77dcd2141679523f935579}
xmm6           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x3, 0x2, 0x1, 0x0, 0x7, 0x6, 0x5, 0x4, 0xb, 0xa, 0x9, 0x8, 0xf, 0xe, 0xd, 
    0xc}, v8_int16 = {0x203, 0x1, 0x607, 0x405, 0xa0b, 0x809, 0xe0f, 0xc0d}, v4_int32 = {0x10203, 0x4050607, 0x8090a0b, 0xc0d0e0f}, v2_int64 = {0x405060700010203, 
    0xc0d0e0f08090a0b}, uint128 = 0x0c0d0e0f08090a0b0405060700010203}
xmm7           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x93, 0xbe, 0x6, 0x2c, 0x89, 0x10, 0x8f, 0x11, 0xdf, 0x4, 0xba, 0x9a, 0xca, 
    0x18, 0xd6, 0xab}, v8_int16 = {0xbe93, 0x2c06, 0x1089, 0x118f, 0x4df, 0x9aba, 0x18ca, 0xabd6}, v4_int32 = {0x2c06be93, 0x118f1089, 0x9aba04df, 0xabd618ca},
  v2_int64 = {0x118f10892c06be93, 0xabd618ca9aba04df}, uint128 = 0xabd618ca9aba04df118f10892c06be93}
xmm8           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x3, 0x0, 0x0, 
    0x0}, v8_int16 = {0x3, 0x0, 0x0, 0x0, 0x3, 0x0, 0x3, 0x0}, v4_int32 = {0x3, 0x0, 0x3, 0x3}, v2_int64 = {0x3, 0x300000003},
  uint128 = 0x00000003000000030000000000000003}
xmm9           {v4_float = {0x80000000, 0x80000000, 0x80000000, 0x80000000}, v2_double = {0x8000000000000000, 0x8000000000000000}, v16_int8 = {0x99, 0x79, 0x82, 
    0x5a, 0x99, 0x79, 0x82, 0x5a, 0x99, 0x79, 0x82, 0x5a, 0x99, 0x79, 0x82, 0x5a}, v8_int16 = {0x7999, 0x5a82, 0x7999, 0x5a82, 0x7999, 0x5a82, 0x7999, 0x5a82},
  v4_int32 = {0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999}, v2_int64 = {0x5a8279995a827999, 0x5a8279995a827999}, uint128 = 0x5a8279995a8279995a8279995a827999}
xmm10          {v4_float = {0xb91b510, 0x0, 0x7499f, 0x0}, v2_double = {0x8000000000000000, 0x0}, v16_int8 = {0x51, 0x1b, 0x39, 0x4d, 0xda, 0x93, 0x94, 0xe8, 0xe5, 
    0x33, 0xe9, 0x48, 0xe9, 0xe4, 0x8f, 0x25}, v8_int16 = {0x1b51, 0x4d39, 0x93da, 0xe894, 0x33e5, 0x48e9, 0xe4e9, 0x258f}, v4_int32 = {0x4d391b51, 0xe89493da, 
    0x48e933e5, 0x258fe4e9}, v2_int64 = {0xe89493da4d391b51, 0x258fe4e948e933e5}, uint128 = 0x258fe4e948e933e5e89493da4d391b51}
xmm11          {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, 
  v4_int32 = {0x0, 0x0, 0x0, 0x0}, v2_int64 = {0x0, 0x0}, uint128 = 0x00000000000000000000000000000000}
xmm12          {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, 
  v4_int32 = {0x0, 0x0, 0x0, 0x0}, v2_int64 = {0x0, 0x0}, uint128 = 0x00000000000000000000000000000000}
xmm13          {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, 
  v4_int32 = {0x0, 0x0, 0x0, 0x0}, v2_int64 = {0x0, 0x0}, uint128 = 0x00000000000000000000000000000000}
xmm14          {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, 
  v4_int32 = {0x0, 0x0, 0x0, 0x0}, v2_int64 = {0x0, 0x0}, uint128 = 0x00000000000000000000000000000000}
xmm15          {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, 0x0}, v16_int8 = {0x0 <repeats 16 times>}, v8_int16 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, 
  v4_int32 = {0x0, 0x0, 0x0, 0x0}, v2_int64 = {0x0, 0x0}, uint128 = 0x00000000000000000000000000000000}
mxcsr          0x1fa0	[ PE IM DM ZM OM UM PM ]
(gdb)



-----邮件原件-----
发件人: Jeffrey Walton [mailto:noloader at gmail.com]
发送时间: 2016年3月3日 12:31
收件人: Hejian (E)
主题: Re: [openssl-dev] 答复: 答复: [openssl.org #4360] [BUG] OpenSSL-1.0.1 crash on sha1_block_data_order_ssse3 asm

Hi Hejian,

He's probably going to want 'info all-registers' because of MMX/SSE3 and the problem with sha1_block_data_order_ssse3. Also see http://sourceware.org/gdb/onlinedocs/gdb/Registers.html.

I'm just guessing, and my apologies for bringing it up.

Jeff

On Wed, Mar 2, 2016 at 11:21 PM, Hejian via RT <rt at openssl.org> wrote:
> Here is the info reg:
>
> (gdb) info reg
> rax            0x745dd1f0       1952305648
> rbx            0xf92ba6dd       4180387549
> rcx            0x7b69e2f6       2070536950
> rdx            0x86dab00c      2262478860
> rsi            0x6436d580       1681315200
> rdi            0x4763c5a8       1197721000
> rbp            0x72856ca1      0x72856ca1
> rsp            0x50a7e100      0x50a7e100
> r8             0x55555a419c60       93825074830432
> r9             0x2b4174415ff8         47560123310072
> r10            0x2b417433acb8      47560122412216
> r11            0x2b41740e9080     47560119980160
> r12            0xffffffffffffffe7 -25
> r13            0x2b417433acf8       47560122412280
> r14            0x55555a419c7c      93825074830460
> r15            0x3ff          1023
> rip            0x2b41740e8db8       0x2b41740e8db8 <sha1_block_data_order_ssse3+2984>
> eflags         0x10202 [ IF RF ]
> cs             0x33  51
> ss             0x2b  43
> ds             0x0    0
> es             0x0    0
> fs             0x63   99
> gs             0x0    0
> (gdb)
>
>
> -----邮件原件-----
> 发件人: Andy Polyakov via RT [mailto:rt at openssl.org]
> 发送时间: 2016年3月3日 1:24
> 收件人: Hejian (E)
> 抄送: openssl-dev at openssl.org
> 主题: Re: [openssl-dev] 答复: [openssl.org #4360] [BUG] OpenSSL-1.0.1 
> crash on sha1_block_data_order_ssse3 asm
>
>>             0x00002b41740e8da7 <+2967>:       je     0x2b41740e8f40 <sha1_block_data_order_ssse3+3376>
>>             0x00002b41740e8dad <+2973>:       movdqa 0x40(%r11),%xmm6
>>             0x00002b41740e8db3 <+2979>:       movdqa (%r11),%xmm9
>>          => 0x00002b41740e8db8 <+2984>:         movdqu (%r9),%xmm0                             --is this what you want ?
>
> And 'info reg' please.

-- 
Ticket here: http://rt.openssl.org/Ticket/Display.html?id=4360
Please log in as guest with password guest if prompted



More information about the openssl-dev mailing list