Lack of documentation for OPENSSL_ia32cap_P
jb-openssl at wisemo.com
Thu Jul 23 00:35:28 UTC 2020
The OPENSSL_ia32cap_P variable, its bitfields and the code that sets
it (in assembler) seemto have no clear documentation.
Looking at x86_64cpuid.pl, I see jumps to ".Lintel" etc. being conditional
on stuff other than the CPU being an Intel CPU, while the code in there is
generally unreadable due to the backwards SCO assembler format and the lack
of clear comments about register usage such as "Here, EDX holds XXX and ESI
holds YYYY" or eventhe code rationale "P50 microarchitecture stepping A
incorrectly implements FDIV, so clear out private bit for using that in
As there is an external interface for changing the variable via an
var, the lack of documentation makes that useless except for "cargo-cult"
copying of values from old mailing list posts.
Jakob Bohm, CIO, Partner, WiseMo A/S. https://www.wisemo.com
Transformervej 29, 2860 Søborg, Denmark. Direct +45 31 13 16 10
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