Lack of documentation for OPENSSL_ia32cap_P

[Jan Just Keijser]

On 23/07/20 02:35, Jakob Bohm via openssl-users wrote:
> The OPENSSL_ia32cap_P variable, its bitfields and the code that sets
> it (in assembler) seemto have no clear documentation.
>
> Looking at x86_64cpuid.pl, I see jumps to ".Lintel" etc. being 
> conditional
> on stuff other than the CPU being an Intel CPU, while the code in 
> there is
> generally unreadable due to the backwards SCO assembler format and the 
> lack
> of clear comments about register usage such as "Here, EDX holds XXX 
> and ESI
> holds YYYY" or eventhe code rationale "P50 microarchitecture stepping A
> incorrectly implements FDIV, so clear out private bit for using that in
> bignum implementations"
>
> As there is an external interface for changing the variable via an 
> environment
> var, the lack of documentation makes that useless except for "cargo-cult"
> copying of values from old mailing list posts.
in the openssl 1.1.1g tree there's a file 'doc/man3/OPENSSL_ia32cap.pod' 
which documents it a little - not sure if that is still up-to-date though...

HTH,

JJK